Xizi Chen
Supervisor of Master's Candidates
Name (Simplified Chinese):Xizi Chen
Name (English):Xizi Chen
Name (Pinyin):chenxizi
Administrative Position:专任教师
Academic Titles:专任教师
Status:Employed
Education Level:博士
Degree:Doctoral degree
Business Address:华中农业大学第一综合楼B座413
E-Mail:
Alma Mater:The Hong Kong University of Science and Technology
Teacher College:College of Informatics
School/Department:Huazhong Agricultural University
Discipline:Computer Architecture Computer Applications Technology
Other Contact Information:
PostalAddress：
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Paper Publications
- Xizi Chen,Jingyang Zhu,Jingbo Jiang,Chi-Ying Tsui.Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD，CCF-A),2023,
- Late Breaking Results: Weight Decay is ALL You Need for Neural Network Sparsification.美国:2023 60th ACM/IEEE Design Automation Conference (DAC),2023,
- Xizi Chen,Jingyang Zhu,Jingbo Jiang,Chi-Ying Tsui.Tight Compression: Compressing CNN Model Tightly Through Unstructured Pruning and Simulated Annealing Based Permutation.57th Design Automation Conference (DAC, CCF-A),2020,
- Accelerating Large Kernel Convolutions with Nested Winograd Transformation.2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC),2023,
- Xizi Chen,Jingbo Jiang,Jingyang Zhu,Chi-Ying Tsui.SubMac: Exploiting the Subword-Based Computation in RRAM-Based CNN Accelerator for Energy Saving and Speedup.Integration, the VLSI Journal (CCF-C),2019,
- Xizi Chen,Jingyang Zhu,Jingbo Jiang,Chi-Ying Tsui.CompRRAE: RRAM-Based Convolutional Neural Network Accelerator with Reduced Computations Through a Runtime Activation Estimation.24th Asia and South Pacific Design Automation Conference (ASP-DAC, CCF-C),2019,
- Xizi Chen,Jingbo Jiang,Jingyang Zhu,Chi-Ying Tsui.A High-Throughput and Energy-Efficient RRAM-Based Convolutional Neural Network Using Data Encoding and Dynamic Quantization.23rd Asia and South Pacific Design Automation Conference (ASP-DAC, CCF-C),2018,
- Xiaomeng Wang,Xuejiao Liu,Xianghong Hu,Xiaopeng Zhong,Xizi Chen,Yu Liu,Patrick Kong,Fengshi Tian,Chi-Ying Tsui.TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network.2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS),2022,
- Jingyang Zhu,Jingbo Jiang,Xizi Chen,Chi-Ying Tsui.SparseNN: An Energy-Efficient Neural Network Accelerator Exploiting Input and Output Sparsity.Design, Automation and Test in Europe Conference and Exhibition (DATE, CCF-C),2018,
- Jingbo Jiang,Xizi Chen,Chi-Ying Tsui.A Reconfigurable Winograd CNN Accelerator with Nesting Decomposition Algorithm for Computing Convolution with Large Filters.Under Review (arXiv:2102.13272),
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