陈夕子
硕士生导师
教师姓名：陈夕子
教师英文名称：Xizi Chen
教师拼音名称：chenxizi
职务：专任教师
主要任职：专任教师
职称：副研究员
在职信息：在职
学历：博士
学位：博士学位
办公地点：华中农业大学第一综合楼B座413
电子邮箱：
毕业院校：香港科技大学
所属院系：信息学院
所在单位：信息学院
学科：计算机系统结构 计算机应用技术
其他联系方式
通讯/办公地址：
论文成果
- Xizi Chen,Jingyang Zhu,Jingbo Jiang,Chi-Ying Tsui.Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD，CCF-A类),2023,
- Late Breaking Results: Weight Decay is ALL You Need for Neural Network Sparsification.美国:2023 60th ACM/IEEE Design Automation Conference (DAC),2023,
- Xizi Chen,Jingyang Zhu,Jingbo Jiang,Chi-Ying Tsui.Tight Compression: Compressing CNN Model Tightly Through Unstructured Pruning and Simulated Annealing Based Permutation.57th Design Automation Conference (DAC，CCF-A类),2020,
- Accelerating Large Kernel Convolutions with Nested Winograd Transformation.2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC),2023,
- Xizi Chen,Jingbo Jiang,Jingyang Zhu,Chi-Ying Tsui.SubMac: Exploiting the Subword-Based Computation in RRAM-Based CNN Accelerator for Energy Saving and Speedup.Integration, the VLSI Journal（CCF-C类）,2019,
- Xizi Chen,Jingyang Zhu,Jingbo Jiang,Chi-Ying Tsui.CompRRAE: RRAM-Based Convolutional Neural Network Accelerator with Reduced Computations Through a Runtime Activation Estimation.24th Asia and South Pacific Design Automation Conference (ASP-DAC，CCF-C类),2019,
- Xizi Chen,Jingbo Jiang,Jingyang Zhu,Chi-Ying Tsui.A High-Throughput and Energy-Efficient RRAM-Based Convolutional Neural Network Using Data Encoding and Dynamic Quantization.23rd Asia and South Pacific Design Automation Conference (ASP-DAC，CCF-C类),2018,
- Xiaomeng Wang,Xuejiao Liu,Xianghong Hu,Xiaopeng Zhong,Xizi Chen,Yu Liu,Patrick Kong,Fengshi Tian,Chi-Ying Tsui.TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network.2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS),2022,
- Jingyang Zhu,Jingbo Jiang,Xizi Chen,Chi-Ying Tsui.SparseNN: An Energy-Efficient Neural Network Accelerator Exploiting Input and Output Sparsity.Design, Automation and Test in Europe Conference and Exhibition (DATE，CCF-B类),2018,
- Jingbo Jiang,Xizi Chen,Chi-Ying Tsui.A Reconfigurable Winograd CNN Accelerator with Nesting Decomposition Algorithm for Computing Convolution with Large Filters.Under Review (arXiv:2102.13272),
| |
